1. Field of the Invention
The subject invention is directed to fabricating multilayer circuit boards composed primarily of silicon which have high thermal conductance and possess a thermal expansion coefficient near that of silicon devices and, more particularly, to fabricating a multilayer circuit board which contains buried ground planes and conducting runs.
2. Description of the Prior Art
Silicon has been proposed as a circuit board substrate because a silicon substrate will be matched in thermal expansion properties to the silicon chips mounted thereon and exhibits a high thermal conductivity, beneficial in removing heat from the chips mounted thereon. In GE Report 86CRD010, Isolated Conducting Vias in Silicon Circuit Boards, (Feb., 1986), H. H. Glascock, II et al. proposed using a silicon sheet as a two sided circuit board. In the silicon sheet, laser drilled through-holes, as demonstrated by T. Anthony Houston and J. Loughran in U.S. Pat. No. 4,595,428, issued June 17, 1986, and assigned to the instant assignee, allow interconnection of the circuitry on either side of the board. In "Multilevel Interconnections For Wafer Scale Integration", Journal of Vacuum Science and Technology A, Vol. 4, No. 6, November/December 1986, pp. 3127-3138, J. F. McDonald et al. proposed using silicon as a packing material for semiconductor devices primarily because of matching thermal expansion coefficients. In order to make the silicon plates on either side of the semiconductor device useful as electrical contacts the silicon contact plate was shorted from one side to the other by laser drilled vias which were subsequently filled with metal.
In U.S. Pat. No. 4,541,035, issued Sept. 10, 1985, and assigned to the instant assignee, Carlson et al. disclose a low electrical loss circuit board using a silicon substrate and incorporating multiple levels of patterned conductors. An inner substrate layer of monocrystalline silicon has upper and lower insulative layers disposed on its upper and lower surfaces. A first, inner level of upper and lower patterned conductors is provided on the upper and lower insulative layers, respectively, these layers preferably constituting ground planes for a second, outer level of patterned conductors. Provided on the first level upper and lower patterned conductors are upper and lower layers, respectively, of high resistivity, polycrystalline silicon, over which are provided second level upper and lower patterned conductors, respectively. To provide electrical communication between the first and second level upper conductor patterns, upper conducting feedthroughs are provided which extend through the upper polycrystalline silicon layer. To provide electrical communication between the first and second level lower patterned conductors, lower conducting feedthroughs are provided which extend through the lower polycrystalline silicon layer. The printed circuit board may incorporate still further levels of patterned conductors by iteratively providing additional polycrystalline silicon layers and additional levels of patterned conductors arranged in the foregoing sequence.
McDonald et al. do not discuss the possibility of fabricating a multilayer silicon circuit board with conductive patterns within the circuit board. The proposed silicon board only has circuitry on its upper and lower surfaces. For some applications it is desirable to have multilayer circuit boards containing ground planes and conducting runs within the circuit board. Carlson et al show a multilevel silicon circuit board with inner conductors which are used as ground planes. This device is designed for high frequency applications and is expensive to manufacture. In fabricating the multilayer circuit board a plurality of processing steps are required. First, insulative layers must be formed on a substrate layer. Second, patterned conductors used as a ground plane are formed on the insulative layer. Third, polycrystalline silicon layers are formed on the ground plane. Fourth, patterned conductors are formed on the polycrystalline layer and conducting feedthroughs are created in the polycrystalline layer. If a multilayer circuit board with internal conductive patterns is to be created, the process must be repeated to form another conducting pattern layer and another ground plane layer.